{"id":222,"date":"2024-05-28T02:32:12","date_gmt":"2024-05-28T02:32:12","guid":{"rendered":"https:\/\/ieee-ras.conferences.computer.org\/2024\/?page_id=222"},"modified":"2024-05-28T02:33:13","modified_gmt":"2024-05-28T02:33:13","slug":"invited_talk_amit_pandey_abstract","status":"publish","type":"page","link":"https:\/\/ieee-ras.conferences.computer.org\/2024\/invited_talk_amit_pandey_abstract\/","title":{"rendered":"Invited_talk_Amit_Pandey_Abstract"},"content":{"rendered":"\t\t
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Addressing Serviceability throughout device lifecycle with High Speed Access for Test<\/strong><\/p>

Amit Pandey
Amazon<\/em>
<\/em>Austin, USA
amipande@amazon.com<\/a><\/p>

Brendan Tully
Amazon<\/em>
<\/em>Austin, USA
bttully@amazon.com<\/a><\/p>

Karthikeyan Natarajan
Synopsys
<\/em>Sunnyvale, California
karthikn@synopsys.com<\/a><\/p>

Abstract<\/strong><\/p>

The design sizes and complexity of modern large scale SoCs continue to grow exponentially especially for the cutting-edge chips that are used in Artificial Intelligence (AI) applications.\u00a0 With the rapid growth in semiconductor complexity, higher expectations for SoC performance and longevity, there is a need to continuously monitor the device throughout its life cycle to maximize performance and identify defects before they impact system operations.\u00a0 In order to diagnose and potentially repair such failing devices while still in system, a variety of testing methodologies have been used in the industry.\u00a0 SCAN vectors when reused for Silicon Lifecycle Management (SLM) are effective at targeting specific parts of the devices and ease up the diagnosis process.\u00a0 These vectors along with BIST and miscellaneous sensors embedded into the silicon device allows the servers in the datacenter to be remotely monitored and repaired before they can impact functional system operations.\u00a0 However, the volume of such data generally tends to be very large which make it difficult to be applied in-system without a robust and high-speed network access mechanism. \u00a0The High-Speed IO access mechanism provides plenty of bandwidth as the native protocol of these interfaces are used.\u00a0 In this presentation we will provide an overview of the High-Speed IO access solution which enables SCAN Vectors to be applied In-Field for an Amazon Web Services (AWS) Machine Learning (ML) and Artificial Intelligence (AI) Acceleration system.\u00a0 We will show how an embedded microcontroller sits at the heart of such a system and allows for remote monitoring and servicing.\u00a0 Examples of how High-speed access architecture can be applied to structures like BIST, JTAG, redundancy\/repair, PVT sensors and monitors to address datacenter serviceability needs will also be presented.<\/p>

Keywords<\/strong><\/p>

Silicon Lifecycle Management (SLM), Scan, Automatic Test Pattern Generation (ATPG), High-Speed I\/O, Functional Protocol, System Level Test (SLT), In-System Test (IST), Built-in Self-Test (BIST), Sensors<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"

Addressing Serviceability throughout device lifecycle with High Speed Access for Test Amit Pandey AmazonAustin, USAamipande@amazon.com Brendan TullyAmazonAustin, USAbttully@amazon.com Karthikeyan NatarajanSynopsysSunnyvale, Californiakarthikn@synopsys.com Abstract The design sizes and complexity of modern large scale SoCs continue to grow exponentially especially for the cutting-edge chips that are used in Artificial Intelligence (AI) applications.\u00a0 With the rapid growth in semiconductor […]<\/p>\n","protected":false},"author":4,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"elementor_canvas","meta":{"footnotes":"","_members_access_role":[],"_members_access_error":""},"class_list":["post-222","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/pages\/222","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/users\/4"}],"replies":[{"embeddable":true,"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/comments?post=222"}],"version-history":[{"count":0,"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/pages\/222\/revisions"}],"wp:attachment":[{"href":"https:\/\/ieee-ras.conferences.computer.org\/2024\/wp-json\/wp\/v2\/media?parent=222"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}